//full_add.v 全加器
module full_add(
input a,
input b,
input carry,
output sum,
output count
);
assign {count,sum}=a+b+carry;
endmodule
//full_add_tb.v
module full_add_tb(
);
reg a;
reg b;
reg carry;
wire sum;
wire count;
initial begin
a=1;
b=0;
carry=1;
end
always begin
#({$random}%100)
a=~a;
#({$random}%100)
b=~b;
#({$random}%100)
carry=~carry;
end
full_add full_add_tb(
.carry(carry),
.a(a),
.b(b),
.sum(sum),
.count(count)
);
endmodule
